The present invention relates to a non-volatile memory device and a method of programming a multi level cell in the non-volatile memory device. More particularly, the present invention relates to a non-volatile memory device and a method of programming a multi level cell in the non-volatile memory device for programming efficiently a most significant bit of a specific memory cell.
Demand has increased for a non-volatile memory device which electrically programs and erases data, and does not require a refresh function of periodically rewriting data.
The non-volatile memory device includes a memory cell array having memory cells for storing data in a matrix, and a page buffer for programming data in a certain memory cell or reading data from a specific memory cell.
The page buffer has a pair of bit lines connected to the memory cells, a register for storing temporarily data to be programmed in the memory cell array or storing data read from the memory cell array, a sensing node for sensing voltage level of a specific bit line or a given register, and a bit line selecting circuit for controlling connection of the bit line and the sensing node.
A memory device for storing one or more bits has been developed to enhance integrity of the non-volatile memory device. This memory device is referred to as a multi level cell (MLC).
When programming the MLC for storing, for example, 2 bits, the MLC may store four data, e.g. 11, 10, 01 and 00. As a result, integrity of the non-volatile memory device may be increased.
A method of programming the MLC includes an operation of programming a corresponding memory cell by applying a program voltage to a word line of the memory cell and a verifying operation of verifying whether the program is performed. In the method of programming the MLC, unlike a method of programming a SLC, an operation of programming a least significant bit and an operation of programming a most significant bit are separately performed. When the most significant bit is programmed, at least two verifying operations are performed using verifying voltages having different magnitudes. Particularly, a first verifying operation is performed in accordance with a first verifying voltage, and a second verifying operation is performed in accordance with a second verifying voltage that is higher than the first verifying voltage irrespective of whether the first verifying operation is complete.
However, when the program voltage is applied in a unit of a page, the memory cell may not be programmed up to a voltage more than the second verifying voltage when the memory cell is not programmed to a voltage more than the first verifying voltage. As a result, efficiency of the method of programming the MLC may be lowered.